1. Technical Field of the Invention
The present invention relates to a memory cell structure of a ferroelectric memory, and more particularly to a memory cell structure of a stacked type memory cell and a method for manufacturing the same.
2. Prior Art
In a conventional method of forming a ferroelectric memory cell, for example, in a stacked type memory structure, a capacitor layer of a memory cell array is formed over a semiconductor forming layer that is composed of transistors and wiring layers. For forming capacitors, patterning steps need to be conducted to form a lower electrode layer, a ferroelectric film and an upper electrode layer of the capacitors. The steps are conducted by a lithography technique that includes steps of photoresist coating, pattern exposure and etching. However, when the patterning steps are repeated to form the capacitors, the number of positioning of layers increases and this results in deviations in patterns, in other words, the alignment accuracy lowers. Also, the ferroelectric film is likely to be damaged by the lithography (plasma etching), and the photoresist that is an organic material has a poor separation characteristic with respect to the ferroelectric film that includes an organic material. Furthermore, a higher number of patterning steps results in a higher cost.
Therefore, it is an object of the present invention to provide a memory cell structure in which capacitor cell arrays can be formed without conducting patterning steps by lithography as much as possible.
In order to achieve the object described above, a ferroelectric capacitor array in accordance with the present invention is equipped with a ferroelectric film having concave and convex patterns formed on both sides thereof that correspond to a plurality of capacitors, a pair of electrodes disposed at locations corresponding to the convex sections of the ferroelectric film, and an anisotropic conduction film that is provided at least between the convex sections of the ferroelectric film and the electrodes to thereby electrically connect the convex sections of the ferroelectric film and the electrodes.
With the structure described above, a large amount of capacitors can be formed without conducting a patterning (lithography) process. As a result, damages to the ferroelectric film can be reduced.
Preferably, the ferroelectric film may be formed by using an original plate (mold) having concave and convex patterns corresponding to a plurality of capacitors and transferring the concave and convex patterns onto a ferroelectric material. With the structure described above, the ferroelectric film can be formed without conducting a patterning (lithography) process. As a result, damages to the ferroelectric film can be reduced.
The ferroelectric capacitor array described above is preferably applicable to ferroelectric memories. Preferably, the pair of electrodes are formed over first and second substrates, respectively. The first and second substrates may include LSI circuits that execute selection, writing, reading and the like of memory cells.
A stacked type memory in accordance with the present invention has a stacked layer including a semiconductor circuit layer in which a semiconductor circuit is formed and a capacitor layer in which capacitors for memory cells are formed. The capacitor layer includes a first electrode film in which one electrodes of a group of the capacitors that form a memory cell array are formed, a ferroelectric film having concave and convex patterns formed on both sides thereof that correspond respectively to the group of the electrodes, a second electrode film in which the other electrodes of the group of the capacitors that form the memory cell array are formed, and first and second anisotropic conduction films that become conductive when a film thickness thereof is smaller than a specified thickness and are provided between the first electrode film and the ferroelectric film and between the second electrode film and the ferroelectric film, respectively. With the structure described above, the ferroelectric film can be formed without conducting a patterning (lithography) process. As a result, damages to the ferroelectric film can be reduced.
A method for manufacturing a ferroelectric memory in accordance with the present invention includes the steps of using an original plate having concave and convex patterns corresponding to capacitors of memory cells to transfer the concave and convex patterns onto a ferroelectric material to thereby form a ferroelectric film having concave and convex sections on at least one surface thereof; stacking a first substrate in which electrodes on one side of the capacitors are formed over one surface of the ferroelectric film through a first anisotropic conduction film; and stacking electrodes on the other side of the capacitors over the other surface of the ferroelectric film.
Preferably, in the step of stacking electrodes on the other side of the capacitors over the other surface of the ferroelectric film, a second substrate in which electrodes on the other side of the capacitors are formed is formed over the other surface of the ferroelectric film through a second anisotropic conduction film.